Noesis Technologies offers an extensive library of state-of-the-art signal processing cores used at PHY level of a transmission system. Discrete Fourier Transforms (DFT) are very common in OFDM based wireless applications as well as in many other telecom applications. The Fast Fourier Transform (FFT) algorithm provides an efficient method for DFT computations in real-time applications.
A fully configurable FFT/IFFT processor has been developed that provides SoC designers with a range of high performance FFT cores for various target technologies and application requirements. The ntFFT IP Core employs a revolutionary parameterized architecture where the user can fine tune the level of data-path parallelism in order to achieve the optimum trade-off between silicon resources and throughput rate. A wide range of FFT lengths from 8-point to 8K-points is supported. Support for any power of 2 higher than 8192 is also supported due to fully generic architecture. A fully configurable soft output demodulator has been designed that receives the equalized complex samples and converts them to a bit stream with soft output information associated with each bit. The probabilistic information is generated based on LLR computations. The core also supports multiple PSK and QAM modulation levels and programmable number of soft bits.
The performance evaluation of a telecom system under the presence of noise using software can be very time consuming. Whereas the noise generation in the analog domain is an easy task, in digital domain the generation of AWGN is a much more complex task. The ntAWGN core has been designed to provide a hardware implementation of an accurate AWGN noise generator that can be used in the efficient performance evaluation of a digital communication system. In addition Noesis Technologies provides customized IP Cores in the areas of channel equalization, channel estimation and synchronization.