OFDM Channel Estimator - ntCH_EST
The wideband OFDM signal suffers from frequency selective fading. Therefore it is necessary to identify and invert the discrete transfer function of the channel. The accurate channel estimation is achieved with the exploitation of known reference signals and pilots into the OFDM frame. The ntCH_EST core uses the pilots to determine the channel impulse response in the frequency domain. Channel estimation is performed on a block-per-block basis, where one block is composed of a programmable number of OFDM symbols. The pilot allocation and the block size is fully programmable. The ntCH_EST implements estimation formulas based on Linear Least Squares (LS) and 1D linear interpolation algorithms for optimum trade-off between complexity and accuracy.Specifically the channel estimation performs the following block based operations:
– Computation of the expected pilot positions and the expected pilot modulation.
– Isolation of the pilot subcarriers from the incoming signal.
– Averaging of the pilot values for the selected channel estimation block to achieve better estimation results.
– Applying the channel estimation formula and calculating the discrete frequency transfer function value for each pilot.
– Interpolating, using linear interpolation techniques, the estimated values in the frequency domain to extract the transfer function for the data subcarriers.
The ntCH_EST supports programmable pilot patterns and programmable OFDM frame size. It is a fully synchronous design, using single clock. It is silicon proven in ASIC and FPGA technologies for a variety of applications.
The ntCH_EST core can be used in a variety of applications, including:
- Wireless broadband – IEEE 802.16.
- Digital Audio Broadcasting (DAB).
- DVB (ETS 300 421 – Satelite).
- DVB (ETS 300-429 – Cable).
- ADSL (ANSI T1.413, ETS 101 388).
- Wireless LAN (IEEE 802.11 WiFi, Hiperlan/2).
- Forth generation (4-G) wireless communications.
- Power line communications (ITU-T 9960 G.hn).
- Fully configurable, high throughput, OFDM Channel Estimator.
- Programmable pilot patterns.
- Estimation based on Linear Least Squares (LS) and 1D linear interpolation algorithms for optimum trade-off between complexity and accuracy.
- Programmable OFDM frame size.
- Fully synchronous design, using single clock.
- Silicon proven in ASIC and FPGA technologies for a variety of applications.
The core has been targeted to both ASIC and FPGA technologies for various applications. Noesis Technologies can also deliver netlist versions of the core optimized to specific area resources and performance requirements..
|Xilinx||Kintex-7||2495 CLB Slices /|
8 Block RAMs /
44 DSP48 Blocks
Noesis has engaged an “open” licensing philosophy in order to allow maximum technology transfer to our client’s engineering teams and to facilitate the integration of our IP cores into our client’s product. Various licensing models are available. The ntCH_EST core is available as a soft core (synthesizable HDL) or as a firm core (netlist for FPGA technologies). The following deliverables are included:
- Fully commented synthesizable VHDL or Verilog source code or FPGA netlist.
- VHDL or Verilog test benches and example configuration files.
- Matlab model.
- Comprehensive technical documentation.
- Technical support.
We offer a variety of IP Core evaluation options such as C++, Matlab bit-true reference models, encrypted RTL simulation models with standalone, self-checking, fully automated RTL test benches, time limited FPGA netlists as well as FPGA demo boards for real-time verification.